71 search results - page 5 / 15 » Snug set-associative caches: reducing leakage power while im... |
181
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WMPI
2004
ACM
15 years 11 months ago
2004
ACM
The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
166
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CODES
2010
IEEE
15 years 4 months ago
2010
IEEE
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
140
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
169
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NOCS
2008
IEEE
16 years 13 days ago
2008
IEEE
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
136
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ICCD
2001
IEEE
16 years 3 months ago
2001
IEEE
Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of increased static energy consumption ...