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ICCCN
2007
IEEE
16 years 20 days ago
Infrastructure for Cross-Layer Designs Interaction
Abstract—The current system design of mobile ad hoc networks (MANET), derived from their traditional fixed counterparts, cannot fully meet the requirements inherent to the dynam...
Zhijiang Chang, Georgi Gaydadjiev, Stamatis Vassil...
INFOCOM
2007
IEEE
16 years 19 days ago
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...
IPCCC
2007
IEEE
16 years 19 days ago
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-K...
IISWC
2006
IEEE
16 years 11 days ago
Characterization of Error-Tolerant Applications when Protecting Control Data
Soft errors have become a significant concern and recent studies have measured the “architectural vulnerability factor” of systems to such errors, or conversely, the potentia...
Darshan D. Thaker, Diana Franklin, John Oliver, Su...
ISPASS
2006
IEEE
16 years 10 days ago
Considering all starting points for simultaneous multithreading simulation
Commercial processors have support for Simultaneous Multithreading (SMT), yet little work has been done to provide representative simulation results for SMT. Given a workload, cur...
Michael Van Biesbrouck, Lieven Eeckhout, Brad Cald...