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ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
15 years 11 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
VLDB
2000
ACM
135views Database» more  VLDB 2000»
15 years 10 months ago
Telcordia's Database Reconciliation and Data Quality Analysis Tool
This demonstration illustrates how a comprehensive database reconciliation tool can provide the ability to characterize data-quality and data-reconciliation issues in complex real...
Francesco Caruso, Munir Cochinwala, Uma Ganapathy,...
WSC
2008
15 years 9 months ago
Simplification and aggregation strategies applied for factory analysis in conceptual phase using simulation
Despite that simulation possesses an establish background and offers tremendous promise for designing and analyzing complex production systems, manufacturing industry has been les...
Matias Urenda Moris, Amos Ng, Jacob Svensson
ASPLOS
2008
ACM
15 years 8 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
ICWN
2008
15 years 8 months ago
A Finite Queue Model Analysis of PMRC-based Wireless Sensor Networks
In our previous work, a highly scalable and faulttolerant network architecture, the Progressive Multi-hop Rotational Clustered (PMRC) structure, is proposed for constructing large...
Qiaoqin Li, Mei Yang, Hongyan Wang, Yingtao Jiang,...