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DAC
2006
ACM
16 years 7 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
VLSID
2006
IEEE
156views VLSI» more  VLSID 2006»
16 years 7 months ago
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...
Jungsub Kim, Mary Jane Irwin, Narayanan Vijaykrish...
ICCD
2007
IEEE
151views Hardware» more  ICCD 2007»
16 years 3 months ago
Benchmarks and performance analysis of decimal floating-point applications
The IEEE P754 Draft Standard for Floating-point Arithmetic provides specifications for Decimal Floating-Point (DFP) formats and operations. Based on this standard, many developer...
Liang-Kai Wang, Charles Tsen, Michael J. Schulte, ...
CGO
2010
IEEE
16 years 1 months ago
Towards program optimization through automated analysis of numerical precision
Reducing the arithmetic precision of a computation has real performance implications, including increased speed, decreased power consumption, and a smaller memory footprint. For s...
Michael D. Linderman, Matthew Ho, David L. Dill, T...
ASPLOS
2009
ACM
16 years 1 months ago
Performance analysis of accelerated image registration using GPGPU
This paper presents a performance analysis of an accelerated 2-D rigid image registration implementation that employs the Compute Unified Device Architecture (CUDA) programming e...
Peter Bui, Jay B. Brockman