Sciweavers

3507 search results - page 282 / 702
» Slicing for architectural analysis
Sort
View
ISCA
2007
IEEE
192views Hardware» more  ISCA 2007»
16 years 1 months ago
Analysis of redundancy and application balance in the SPEC CPU2006 benchmark suite
The recently released SPEC CPU2006 benchmark suite is expected to be used by computer designers and computer architecture researchers for pre-silicon early design analysis. Partia...
Aashish Phansalkar, Ajay Joshi, Lizy Kurian John
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
16 years 1 months ago
System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint
— Multiview video coding (MVC) systems require much more bandwidth and computational complexity relative to mono-view video systems. Thus, when designing a VLSI architecture for ...
Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi ...
CHES
2004
Springer
121views Cryptology» more  CHES 2004»
16 years 5 days ago
Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?
Since their publication in 1998, power analysis attacks have attracted significant attention within the cryptographic community. So far, they have been successfully applied to di...
François-Xavier Standaert, Siddika Berna &O...
COMPSAC
2003
IEEE
16 years 2 days ago
Sensitivity Analysis of Software Reliability for Component-Based Software Applications
The parameters in these software reliability models are usually directly obtained from the field failure data. Due to the dynamic properties of the system and the insufficiency of...
Jung-Hua Lo, Chin-Yu Huang, Sy-Yen Kuo, Michael R....
LCTRTS
1998
Springer
15 years 11 months ago
Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
Thomas Lundqvist, Per Stenström