Sciweavers

3507 search results - page 221 / 702
» Slicing for architectural analysis
Sort
View
WORDS
2003
IEEE
15 years 12 months ago
A Framework for Scalable Analysis and Design of System-wide Graceful Degradation in Distributed Embedded Systems
We present a framework that will enable scalable analysis and design of graceful degradation in distributed embedded systems. We define graceful degradation in terms of utility. A...
Charles P. Shelton, Philip Koopman, William Nace
DAC
1996
ACM
15 years 10 months ago
Glitch Analysis and Reduction in Register Transfer Level
: We presentdesign-for-low-power techniques based on glitch reduction for register-transfer level circuits. We analyze the generation and propagation of glitches in both the contro...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
ISLPED
1996
ACM
105views Hardware» more  ISLPED 1996»
15 years 10 months ago
Energy delay analysis of partial product reduction methods for parallel multiplier implementation
This paper examines the energy delay implications of partial product reduction methods employed in parallel multiplier implementations. Radix 4 Modified Booth Algorithm (MBA) is c...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
ISCA
1992
IEEE
113views Hardware» more  ISCA 1992»
15 years 10 months ago
Dynamic Dependency Analysis of Ordinary Programs
A quantitative analysis of program execution is essential to the computer architecture design process. With the current trend in architecture of enhancing the performance of unipr...
Todd M. Austin, Gurindar S. Sohi
DAC
2006
ACM
15 years 10 months ago
Refined statistical static timing analysis through
Statistical static timing analysis (SSTA) has been a popular research topic in recent years. A fundamental issue with applying SSTA in practice today is the lack of reliable and e...
Benjamin N. Lee, Li-C. Wang, Magdy S. Abadir