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DAC
2004
ACM
16 years 7 months ago
Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining
With deep-sub-micron (DSM) technology, statistical timing analysis becomes increasingly crucial to characterize signal transmission over global interconnect wires. In this paper, ...
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
COMSWARE
2007
IEEE
16 years 1 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy
FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
15 years 11 months ago
Matching and searching analysis for parallel hardware implementation on FPGAs
Matching and searching computations play an important role in the indexing of data. These computations are typically encoded in very tight loops with a single index variable and a...
Pablo Moisset, Pedro C. Diniz, Joonseok Park
DAC
2005
ACM
15 years 8 months ago
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...
DATE
2007
IEEE
126views Hardware» more  DATE 2007»
16 years 1 months ago
The ARTEMIS cross-domain architecture for embedded systems
platform and a suite of abstract components with which new developments in different application domains can be engineered with minimal effort [1]p.16. Generic platforms, or refere...
Hermann Kopetz