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    VLSID
    2001
    IEEE
    88views VLSI» more  VLSID 2001»
    Switching Noise Analysis Framework For High Speed Logic Families
    16 years 6 months ago
    Switching Noise Analysis Framework For High Speed Logic Families
    Download  www.cercom.polito.it
    Marco Delaurenti, Mariagrazia Graziano, Guido Mase...
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    HPCA
    2003
    IEEE
    129views Distributed And Parallel Com...» more  HPCA 2003»
    Microarchitecture and Performance Analysis of a SPARC-V9 Microprocessor for Enterprise Server Systems
    16 years 6 months ago
    Microarchitecture and Performance Analysis of a SPARC-V9 Microprocessor for Enterprise Server Systems
    Download  www.cs.ucr.edu
    Mariko Sakamoto, Akira Katsuno, Aiichiro Inoue, Ta...
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    FPL
    2007
    Springer
    120views Hardware» more  FPL 2007»
    Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
    16 years 19 days ago
    Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
    Download  www.am.ics.keio.ac.jp
    In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
    Yohei Hasegawa, Hideharu Amano
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    MIDDLEWARE
    2004
    Springer
    167views Distributed And Parallel Com...» more  MIDDLEWARE 2004»
    Security requirements in service oriented architectures for ubiquitous computing
    15 years 12 months ago
    Security requirements in service oriented architectures for ubiquitous computing
    Download  wpage.unina.it
    This work presents a detailed analysis of the security requirements for Service Oriented Architecture in mobile computing, still missing in the current literature. The purpose of ...
    Domenico Cotroneo, Almerindo Graziano, Stefano Rus...
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    CODES
    2008
    IEEE
    161views Software Engineering» more  CODES 2008»
    Intra- and inter-processor hybrid performance modeling for MPSoC architectures
    16 years 29 days ago
    Intra- and inter-processor hybrid performance modeling for MPSoC architectures
    Download  home.rcs.ei.tum.de
    The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
    Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
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