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GLVLSI
2006
IEEE
142views VLSI» more  GLVLSI 2006»
16 years 17 days ago
Dynamic instruction schedulers in a 3-dimensional integration technology
We present the design of high-performance and energy-efficient dynamic instruction schedulers in a 3-Dimensional integration technology. Based on a previous observation that the c...
Kiran Puttaswamy, Gabriel H. Loh
PARELEC
2006
IEEE
16 years 16 days ago
Application-Driven Development of Concurrent Packet Processing Platforms
We have developed an application-driven methodology for implementing parallel and heterogeneous programmable platforms. We deploy our flow for network access platforms where we h...
Christian Sauer, Matthias Gries, Jörg-Christi...
ASAP
2003
IEEE
155views Hardware» more  ASAP 2003»
15 years 12 months ago
Decimal Multiplication Via Carry-Save Addition
Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This p...
Mark A. Erle, Michael J. Schulte
GLVLSI
2003
IEEE
145views VLSI» more  GLVLSI 2003»
15 years 11 months ago
Using dynamic domino circuits in self-timed systems
We introduce a simple hierarchical design technique for using dynamic domino circuits to build high-performance self-timed data path circuits. We wrap the dynamic domino circuit i...
Jung-Lin Yang, Erik Brunvand
ISLPED
2009
ACM
108views Hardware» more  ISLPED 2009»
15 years 11 months ago
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
David Bol, Denis Flandre, Jean-Didier Legat