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ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
16 years 2 months ago
Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor
Shailender Chaudhry, Robert Cypher, Magnus Ekman, ...
VLDB
2005
ACM
121views Database» more  VLDB 2005»
16 years 29 days ago
Improving Database Performance on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) allows multiple threads to supply instructions to the instruction pipeline of a superscalar processor. Because threads share processor resources,...
Jingren Zhou, John Cieslewicz, Kenneth A. Ross, Mi...
MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
15 years 11 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll
ICS
2007
Tsinghua U.
16 years 1 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
ISCA
1998
IEEE
104views Hardware» more  ISCA 1998»
15 years 11 months ago
Selective Eager Execution on the PolyPath Architecture
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
Artur Klauser, Abhijit Paithankar, Dirk Grunwald