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FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 11 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
SIGCOMM
1996
ACM
15 years 11 months ago
Receiver-Driven Layered Multicast
State of the art, real-time, rate-adaptive, multimedia applications adjust their transmission rate to match the available network capacity. Unfortunately, this source-based rate-a...
Steven McCanne, Van Jacobson, Martin Vetterli
PCRCW
1997
Springer
15 years 11 months ago
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Law...
SIGMETRICS
1993
ACM
123views Hardware» more  SIGMETRICS 1993»
15 years 11 months ago
Effectiveness of Trace Sampling for Performance Debugging Tools
Recently there has been a surge of interest in developing performance debugging tools to help programmers tune their applications for better memory performance [2, 4, 10]. These t...
Margaret Martonosi, Anoop Gupta, Thomas E. Anderso...
SIGGRAPH
2010
ACM
15 years 10 months ago
Camera-less Smart Laser Projector
We introduce here our latest ‘smart laser projector’ prototype, i.e, a modified laser-based projector capable of augmenting all kind of surfaces while simultaneously using th...
Álvaro Cassinelli, Alexis Zerroug, Yoshihir...
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