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DFT
2006
IEEE
143views VLSI» more  DFT 2006»
16 years 24 days ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
ICDCS
2006
IEEE
16 years 23 days ago
Self-Protection for Wireless Sensor Networks
Wireless sensor networks have recently been suggested for many surveillance applications such as object monitoring, path protection, or area coverage. Since the sensors themselves...
Dan Wang, Qian Zhang, Jiangchuan Liu
ICPADS
2006
IEEE
16 years 23 days ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
ICPPW
2006
IEEE
16 years 23 days ago
Parallel Hyperspectral Image Processing on Commodity Graphics Hardware
Many recent research efforts have been devoted to the use of commodity hardware for solving computationallyintensive scientific problems. Among such problems, hyperspectral imagi...
Javier Setoain, Christian Tenllado, Manuel Prieto,...
ICPR
2006
IEEE
16 years 23 days ago
Gender Recognition in Non Controlled Environments
In most of the automatic face classification applications, images should be captured in natural environments, where partial occlusions or high local changes in the illumination a...
Àgata Lapedriza, Manuel J. Marín-Jim...
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