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ISCAS
2008
IEEE
122views Hardware» more  ISCAS 2008»
16 years 1 months ago
A nano-CMOS process variation induced read failure tolerant SRAM cell
— In a nanoscale technology, memory bits are highly susceptible to process variation induced read/write failures. To address the above problem, in this paper a new memory cell is...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
ISCAS
2008
IEEE
160views Hardware» more  ISCAS 2008»
16 years 1 months ago
ATLAS: An adaptively formed hierarchical cell library based analog synthesis framework
— This paper presents ATLAS - a framework for automated analog circuit synthesis that comprises of both topology generation and subsequent circuit sizing. A hierarchically arrang...
Angan Das, Ranga Vemuri
PIMRC
2008
IEEE
16 years 1 months ago
Effects of topology on local throughput-capacity of ad hoc networks
—Most publications on the capacity and performance of wireless ad hoc networks share the underlying assumption of a uniform random distribution of nodes. In this paper, we study ...
Jakob Hoydis, Marina Petrova, Petri Mähö...
WCNC
2008
IEEE
16 years 1 months ago
Physical Carrier Sensing Outage in Single Hop IEEE 802.11 Ad Hoc Networks with Slowly Moving Stations
—Physical Carrier Sensing plays a crucial role in the effectiveness of CSMA-based MAC protocols, yet its properties and impact on the system performance under slow fading channel...
Jin Sheng, Kenneth S. Vastola
ANSS
2007
IEEE
16 years 1 months ago
The Impact of the Mobility Model on Delay Tolerant Networking Performance Analysis
— Delay tolerant networks (DTNs) are a class of networks that experience frequent and long-duration partitions due to sparse distribution of nodes. The topological impairments ex...
Muhammad Abdulla, Robert Simon