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GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
14 years 10 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
INFOCOM
2011
IEEE
14 years 10 months ago
Privacy analysis of user association logs in a large-scale wireless LAN
User association logs collected from a large-scale wireless LAN record where and when a user has used the network. Such information plays an important role in wireless network res...
Keren Tan, Guanhua Yan, Jihwang Yeo, David Kotz
INFOCOM
2011
IEEE
14 years 10 months ago
Continuous multi-dimensional top-k query processing in sensor networks
—Top-k query has long been an important topic in many fields of computer science. Efficient implementation of the top-k queries is the key for information searching. With the n...
Hongbo Jiang, Jie Cheng, Dan Wang, Chonggang Wang,...
ISCA
2011
IEEE
294views Hardware» more  ISCA 2011»
14 years 10 months ago
Moguls: a model to explore the memory hierarchy for bandwidth improvements
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
Guangyu Sun, Christopher J. Hughes, Changkyu Kim, ...
CRYPTO
2011
Springer
180views Cryptology» more  CRYPTO 2011»
14 years 6 months ago
Leakage-Resilient Zero Knowledge
In this paper, we initiate a study of zero knowledge proof systems in the presence of sidechannel attacks. Specifically, we consider a setting where a cheating verifier is allow...
Sanjam Garg, Abhishek Jain 0002, Amit Sahai
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