This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
A typical wafer fab requires numerous decisions for daily operations. Even small decisions on system configurations may have significant impact on the overall fab performance. One...
Daniel Noack, Boon-Ping Gan, Peter Lendermann, Oli...
Dynamic Time Warping (DTW) has been widely used to align and compare two sequences. DTW can efficiently deal with local warp or deformation between sequences. However, it can'...
Abstract—We present a set of modeling constructs accompanied by a high performance simulation kernel for accuracy adaptive transaction level models. In contrast to traditional, ï...
We investigate factors that impact the effectiveness of caching to speed up discrete event simulation. Walsh and Sirer have shown that a variant of function caching (staged simula...