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ISCA
1997
IEEE
93views Hardware» more  ISCA 1997»
15 years 10 months ago
The Energy Efficiency of IRAM Architectures
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
Richard Fromm, Stylianos Perissakis, Neal Cardwell...
ICPP
1995
IEEE
15 years 10 months ago
Impact of Load Imbalance on the Design of Software Barriers
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...
Alexandre E. Eichenberger, Santosh G. Abraham
PLDI
1995
ACM
15 years 10 months ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
SI3D
1995
ACM
15 years 10 months ago
I-COLLIDE: An Interactive and Exact Collision Detection System for Large-Scale Environments
: We present an exact and interactive collision detection system, I-COLLIDE, for large-scale environments. Such environments are characterized by the number of objects undergoing r...
Jonathan D. Cohen, Ming C. Lin, Dinesh Manocha, Ma...
SIGCOMM
1995
ACM
15 years 10 months ago
Protocol Implementation Using Integrated Layer Processing
Integrated Layer Processing (ILP) is an implementation concept which "permit[s] the implementor the option of performing all the [data] manipulation steps in one or two integ...
Torsten Braun, Christophe Diot