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PPL
2007
86views more  PPL 2007»
15 years 5 months ago
Failure-Sensitive Analysis of Parallel Algorithms with Controlled Memory Access Concurrency
ract problem of using P failure-prone processors to cooperatively update all locations of an N-element shared array is called Write-All. Solutions to Write-All can be used iterati...
Chryssis Georgiou, Alexander Russell, Alexander A....
IACR
2011
115views more  IACR 2011»
14 years 6 months ago
Multi-Server Oblivious RAM
Secure two-party computation protocol allows two players, Alice with secret input x and Bob with secret input y, to jointly execute an arbitrary program π(x, y) such that only th...
Steve Lu, Rafail Ostrovsky
LCTRTS
2005
Springer
15 years 12 months ago
Nonintrusive precision instrumentation of microcontroller software
Debugging, testing, and profiling microcontroller programs are notoriously difficult. The lack of supporting software such as an operating system, a narrow interface to the hard...
Ben Titzer, Jens Palsberg
USENIX
2003
15 years 7 months ago
Robust, Portable I/O Scheduling with the Disk Mimic
We propose a new approach for I/O scheduling that performs on-line simulation of the underlying disk. When simulation is integrated within a system, three key challenges must be a...
Florentina I. Popovici, Andrea C. Arpaci-Dusseau, ...
WSC
1997
15 years 7 months ago
The Department of Defense High Level Architecture
The High Level Architecture (HLA) provides the specification of a common technical architecture for use across all classes of simulations in the US Department of Defense. It provi...
Judith S. Dahmann, Richard Fujimoto, Richard M. We...