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IESS
2009
Springer
182views Hardware» more  IESS 2009»
15 years 4 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
JAISE
2011
238views more  JAISE 2011»
15 years 26 days ago
A bio-inspired system model for interactive surveillance applications
Advances in computer vision and pattern recognition research are leading to video surveillance systems with improved scene analysis capabilities. However, up to now few works have ...
Alessio Dore, Matteo Pinasco, Lorenzo Ciardelli, C...
TCBB
2008
137views more  TCBB 2008»
15 years 6 months ago
Toward Verified Biological Models
The last several decades have witnessed a vast accumulation of biological data and data analysis. Many of these data sets represent only a small fraction of the system's behav...
Avital Sadot, Jasmin Fisher, Dan Barak, Yishai Adm...
ICCAD
2001
IEEE
106views Hardware» more  ICCAD 2001»
16 years 3 months ago
System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels
This paper presents a new methodology for system-level power and performance analysis of wireless multimedia systems. More precisely, we introduce an analytical approach based on ...
Radu Marculescu, Amit Nandi, Luciano Lavagno, Albe...
FMCAD
2007
Springer
16 years 16 days ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony