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MEMOCODE
2006
IEEE
16 years 10 days ago
A scenario-aware data flow model for combined long-run average and worst-case performance analysis
Data flow models are used for specifying and analysing signal processing and streaming applications. However, traditional data flow models are either not capable of expressing t...
Bart D. Theelen, Marc Geilen, Twan Basten, Jeroen ...
SIPS
2006
IEEE
16 years 9 days ago
Architecture-Aware LDPC Code Design for Software Defined Radio
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of the...
Yuming Zhu, Chaitali Chakrabarti
SIPS
2006
IEEE
16 years 9 days ago
Configuration and Representation of Large-Scale Dataflow Graphs using the Dataflow Interchange Format
—A wide variety of DSP design tools have been developed that incorporate dataflow graph representations into their GUI-based design environments. However, as the complexity of ap...
Ivan Corretjer, Chia-Jui Hsu, Shuvra S. Bhattachar...
SIPS
2006
IEEE
16 years 9 days ago
A New Early Termination Scheme of Iterative Turbo Decoding Using Decoding Threshold
Although many stopping methods of iterative decoding have been discussed in the literatures extensively, many of them only focus on the solvable decoding. In this paper, we propos...
Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
16 years 9 days ago
A 52mW 1200MIPS compact DSP for multi-core media SoC
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting ...
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