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IPPS
2007
IEEE
16 years 22 days ago
Automatic Trace-Based Performance Analysis of Metacomputing Applications
The processing power and memory capacity of independent and heterogeneous parallel machines can be combined to form a single parallel system that is more powerful than any of its ...
Daniel Becker, Felix Wolf, Wolfgang Frings, Markus...
ISBI
2007
IEEE
16 years 22 days ago
Direct Reconstruction of Spiral Mri Using Least Squares Quantization Table
The least squares quantization table (LSQT) method is proposed to accelerate the direct Fourier transform for reconstructing images from nonuniformly sampled data, similar to the ...
Dong Liang, Edmund Y. Lam, George S. K. Fung
ISCAS
2007
IEEE
103views Hardware» more  ISCAS 2007»
16 years 22 days ago
A Low-cost and High-performance SoC Design for OMA DRM2 Applications
A SoC design for applications of OMA DRM 2 Agent in mobile phones is presented in this paper, which has been verified by Altera Stratix EP1S80B956C6 FPGA development board. Several...
Yehua Gu, Xiaoyang Zeng, Jun Han, Jia Zhao
MSS
2007
IEEE
83views Hardware» more  MSS 2007»
16 years 22 days ago
The RAM Enhanced Disk Cache Project (REDCAP)
This paper presents the RAM Enhanced Disk Cache Project, REDCAP, a new cache of disk blocks which reduces the read I/O time by using a small portion of the main memory. The essent...
Pilar Gonzalez-Ferez, Juan Piernas, Toni Cortes
NOCS
2007
IEEE
16 years 22 days ago
Implementation and Evaluation of a Dynamically Routed Processor Operand Network
— Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets...
Paul Gratz, Karthikeyan Sankaralingam, Heather Han...