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ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
16 years 3 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
ICCD
2003
IEEE
129views Hardware» more  ICCD 2003»
16 years 3 months ago
Reducing dTLB Energy Through Dynamic Resizing
Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant ...
Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubr...
ISPASS
2010
IEEE
16 years 1 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
CHI
2010
ACM
16 years 1 months ago
Knowing where and when to look in a time-critical multimodal dual task
Human-computer systems intended for time-critical multitasking need to be designed with an understanding of how humans can coordinate and interleave perceptual, memory, and motor ...
Anthony J. Hornof, Yunfeng Zhang, Tim Halverson
SC
2009
ACM
16 years 1 months ago
Enabling software management for multicore caches with a lightweight hardware support
The management of shared caches in multicore processors is a critical and challenging task. Many hardware and OS-based methods have been proposed. However, they may be hardly adop...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...