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ISHPC
1999
Springer
15 years 10 months ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
PCRCW
1997
Springer
15 years 10 months ago
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Law...
SP
2010
IEEE
174views Security Privacy» more  SP 2010»
15 years 10 months ago
HyperSafe: A Lightweight Approach to Provide Lifetime Hypervisor Control-Flow Integrity
— Virtualization is being widely adopted in today’s computing systems. Its unique security advantages in isolating and introspecting commodity OSes as virtual machines (VMs) ha...
Zhi Wang, Xuxian Jiang
CCS
2008
ACM
15 years 8 months ago
Code injection attacks on harvard-architecture devices
Harvard architecture CPU design is common in the embedded world. Examples of Harvard-based architecture devices are the Mica family of wireless sensors. Mica motes have limited me...
Aurélien Francillon, Claude Castelluccia
CF
2005
ACM
15 years 8 months ago
Evaluation of extended dictionary-based static code compression schemes
This paper evaluates how much extended dictionary-based code compression techniques can reduce the static code size. In their simplest form, such methods statically identify ident...
Martin Thuresson, Per Stenström