Sciweavers

4747 search results - page 745 / 950
» Shuffle Memory System
Sort
View
DATE
2005
IEEE
133views Hardware» more  DATE 2005»
16 years 6 days ago
Compiler-Based Approach for Exploiting Scratch-Pad in Presence of Irregular Array Access
Scratch-pad memory is becoming an important fixture in embedded multimedia systems. It is significantly more efficient than the cache, in performance and power, and has the add...
Mohammed Javed Absar, Francky Catthoor
DATE
2005
IEEE
132views Hardware» more  DATE 2005»
16 years 6 days ago
Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage
In this paper, we investigate the impact of Tox and Vth on power performance trade-offs for on-chip caches. We start by examining the optimization of the various components of a s...
Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylve...
ICPPW
2005
IEEE
16 years 5 days ago
Performance Evaluation of High-Speed Interconnects Using Dense Communication Patterns
We study the performance of high-speed interconnects using a set of communication micro-benchmarks. The goal is to identify certain limiting factors and bottlenecks with these int...
Rod Fatoohi, Ken Kardys, Sumy Koshy, Soundarya Siv...
IEEEPACT
2005
IEEE
16 years 5 days ago
An Event-Driven Multithreaded Dynamic Optimization Framework
Dynamic optimization has the potential to adapt the program’s behavior at run-time to deliver performance improvements over static optimization. Dynamic optimization systems usu...
Weifeng Zhang, Brad Calder, Dean M. Tullsen
ISPASS
2005
IEEE
16 years 5 days ago
Analysis of Network Processing Workloads
Abstract— Network processing is becoming an increasingly important paradigm as the Internet moves towards an architecture with more complex functionality inside the network. Mode...
Ramaswamy Ramaswamy, Ning Weng, Tilman Wolf