Sciweavers

4747 search results - page 712 / 950
» Shuffle Memory System
Sort
View
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
16 years 7 days ago
HIBI-based multiprocessor SoC on FPGA
Abstract — FPGAs offer excellent platform for System-onChips consisting of Intellectual Property (IP) blocks. The problem is that IP blocks and their interconnections are often F...
Erno Salminen, Ari Kulmala, Timo D. Hämä...
VISUALIZATION
2005
IEEE
16 years 6 days ago
Hardware-Accelerated 3D Visualization of Mass Spectrometry Data
We present a system for three-dimensional visualization of complex Liquid Chromatography - Mass Spectrometry (LCMS) data. Every LCMS data point has three attributes: time, mass, a...
Jose De Corral, Hanspeter Pfister
ACMACE
2005
ACM
16 years 6 days ago
Interactive three-dimensional rendering on mobile computer devices
We present a client/server system that is able to display 3D scenes on handheld devices. This kind of devices have important restrictions of memory and computing power. Therefore,...
Javier Lluch, Rafael Gaitán, Emilio Camahor...
SBCCI
2005
ACM
115views VLSI» more  SBCCI 2005»
16 years 6 days ago
Design of a decompressor engine on a SPARC processor
Code compression, initially conceived as an effective technique to reduce code size in embedded systems, today also brings advantages in terms of performance and energy consumpti...
Richard E. Billo, Rodolfo Azevedo, Guido Araujo, P...
LCPC
2005
Springer
16 years 4 days ago
Software Thread Level Speculation for the Java Language and Virtual Machine Environment
Thread level speculation (TLS) has shown great promise as a strategy for fine to medium grain automatic parallelisation, and in a hardware context techniques to ensure correct TLS...
Christopher J. F. Pickett, Clark Verbrugge