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HPCC
2009
Springer
15 years 11 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...
EUROPAR
2001
Springer
15 years 11 months ago
Building TMR-Based Reliable Servers Despite Bounded Input Lifetimes
This paper is on the construction of a server subsystem in a client/server system in an application context where the number of potential clients can be arbitrarily large. The imp...
Paul D. Ezhilchelvan, Jean-Michel Hélary, M...
HPCA
2000
IEEE
15 years 11 months ago
A Prefetching Technique for Irregular Accesses to Linked Data Structures
Prefetching offers the potential to improve the performance of linked data structure (LDS) traversals. However, previously proposed prefetching methods only work well when there i...
Magnus Karlsson, Fredrik Dahlgren, Per Stenstr&oum...
INFOCOM
1999
IEEE
15 years 11 months ago
Matching Output Queueing with a Combined Input Output Queued Switch
-- The Internet is facing two problems simultaneously: there is a need for a faster switching/routing infrastructure, and a need to introduce guaranteed qualities of service (QoS)....
Shang-Tse Chuang, Ashish Goel, Nick McKeown, Balaj...
HPCA
1996
IEEE
15 years 11 months ago
A Comparison of Entry Consistency and Lazy Release Consistency Implementations
This paper compares several implementations of entry consistency (EC) and lazy release consistency (LRC), two relaxed memory models in use with software distributed shared memory ...
Sarita V. Adve, Alan L. Cox, Sandhya Dwarkadas, Ra...