Sciweavers

4747 search results - page 616 / 950
» Shuffle Memory System
Sort
View
CSSE
2008
IEEE
16 years 1 months ago
The Relation of Version Control to Concurrent Programming
Version control helps coordinating a group of people working concurrently to achieve a shared objective. Concurrency control helps coordinating a group of threads working concurre...
Annette Bieniusa, Peter Thiemann, Stefan Wehr
ECRTS
2008
IEEE
16 years 1 months ago
WCET-driven Cache-based Procedure Positioning Optimizations
Procedure Positioning is a well known compiler optimization aiming at the improvement of the instruction cache behavior. A contiguous mapping of procedures calling each other freq...
Paul Lokuciejewski, Heiko Falk, Peter Marwedel
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
16 years 1 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
IWNAS
2008
IEEE
16 years 1 months ago
Software Barrier Performance on Dual Quad-Core Opterons
Multi-core processors based SMP servers have become building blocks for Linux clusters in recent years because they can deliver better performance for multi-threaded programs thro...
Jie Chen, William A. Watson III
172
Voted
GLOBECOM
2007
IEEE
16 years 1 months ago
A Bit-Node Centric Architecture for Low-Density Parity-Check Decoders
Abstract—A bit-node centric decoder architecture for lowdensity parity-check codes is proposed. This architecture performs the optimum sum-product algorithm. A bit node processin...
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...