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HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
15 years 11 months ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...
CASES
2001
ACM
15 years 10 months ago
Combined partitioning and data padding for scheduling multiple loop nests
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu
ASAP
2008
IEEE
120views Hardware» more  ASAP 2008»
15 years 8 months ago
Lightweight DMA management mechanisms for multiprocessors on FPGA
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
ASPLOS
2008
ACM
15 years 8 months ago
The potential for variable-granularity access tracking for optimistic parallelism
Support for optimistic parallelism such as thread-level speculation (TLS) and transactional memory (TM) has been proposed to ease the task of parallelizing software to exploit the...
Mihai Burcea, J. Gregory Steffan, Cristiana Amza
CASES
2008
ACM
15 years 8 months ago
Efficient code caching to improve performance and energy consumption for java applications
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...
Yu Sun, Wei Zhang