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CVPR
2006
IEEE
16 years 8 months ago
Context and Hierarchy in a Probabilistic Image Model
It is widely conjectured that the excellent ROC performance of biological vision systems is due in large part to the exploitation of context at each of many levels in a part/whole...
Ya Jin, Stuart Geman
DAC
2006
ACM
16 years 7 months ago
DAG-aware AIG rewriting a fresh look at combinational logic synthesis
This paper presents a technique for preprocessing combinational logic before technology mapping. The technique is based on the representation of combinational logic using And-Inve...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
DAC
2006
ACM
16 years 7 months ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
CHI
2007
ACM
16 years 7 months ago
Facebook ride connect
Ride Connect is a tool integrated into the social networking site Facebook's (www.Facebook.com) event planning feature. Ride Connect helps people coordinate transportation t...
John M. Booher, Balakrishna Chennupati, Nina S. On...
VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
16 years 7 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
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