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DATE
2010
IEEE
192views Hardware» more  DATE 2010»
15 years 11 months ago
PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, ...
DSD
2002
IEEE
110views Hardware» more  DSD 2002»
15 years 11 months ago
A Design for a Low-Power Digital Matched Filter Applicable to W-CDMA
This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum...
Shoji Goto, Takashi Yamada, Norihisa Takayarna, Yo...
DSN
2002
IEEE
15 years 11 months ago
Secure Intrusion-tolerant Replication on the Internet
This paper describes a Secure INtrusion-Tolerant Replication Architecture1 (SINTRA) for coordination in asynchronous networks subject to Byzantine faults. SINTRA supplies a number...
Christian Cachin, Jonathan A. Poritz
ICPADS
2002
IEEE
15 years 11 months ago
Self-Stabilizing Wormhole Routing on Ring Networks
Wormhole routing is most common in parallel architectures in which messages are sent in small fragments called flits. It is a lightweight and efficient method of routing message...
Ajoy Kumar Datta, Maria Gradinariu, Anthony B. Ken...
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 11 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock