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DRM
2005
Springer
16 years 12 days ago
DRM interoperability analysis from the perspective of a layered framework
Interoperability is currently seen as one of the most significant problems facing the digital rights management (DRM) industry. In this paper we consider the problem of interoper...
Gregory L. Heileman, Pramod A. Jamkhedkar
CODES
1998
IEEE
15 years 11 months ago
Software timing analysis using HW/SW cosimulation and instruction set simulator
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...
Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-V...
196
Voted
ICS
1999
Tsinghua U.
15 years 11 months ago
Classifying load and store instructions for memory renaming
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary ...
IEEEPACT
1998
IEEE
15 years 11 months ago
Athapascan-1: On-Line Building Data Flow Graph in a Parallel Language
In order to achieve practical efficient execution on a parallel architecture, a knowledge of the data dependencies related to the application appears as the key point for building...
François Galilée, Jean-Louis Roch, G...
MICRO
1998
IEEE
91views Hardware» more  MICRO 1998»
15 years 11 months ago
Effective Cluster Assignment for Modulo Scheduling
Clustering is one solution to the demand for wideissue machines and fast clock cycles because it allows for smaller, less ported register files and simpler bypass logic while rema...
Erik Nystrom, Alexandre E. Eichenberger