Sciweavers

4312 search results - page 146 / 863
» Semi-User-Level Communication Architecture
Sort
View
IPPS
2006
IEEE
16 years 14 days ago
Realization of virtual networks in the DECOS integrated architecture
Due to the better utilization of computational and communication resources and the improved coordination of application subsystems, designers of large distributed embedded systems...
Roman Obermaisser, Philipp Peti
SLIP
2006
ACM
16 years 12 days ago
Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
DATE
2010
IEEE
141views Hardware» more  DATE 2010»
15 years 11 months ago
Loosely Time-Triggered Architectures for Cyber-Physical Systems
Abstract—Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz’ Time-Triggered Architectures (TTA) have been proposed as...
Albert Benveniste
DAC
2003
ACM
16 years 7 months ago
A complexity effective communication model for behavioral modeling of signal processing applications
In this paper, we argue that the address space of memory regions that participate in inter task communication is over-specified by the traditional communication models used in beh...
M. N. V. Satya Kiran, M. N. Jayram, Pradeep Rao, S...
VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
16 years 6 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu