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2003
IEEE
15 years 11 months ago
"Plug-and-Play" Cluster Computing Using Mac OS X
At UCLA's Plasma Physics Group, to achieve accessible computational power for our research goals, we developed the tools to build numerically-intensive parallel computing clu...
Dean E. Dauger, Viktor K. Decyk
CODES
2003
IEEE
15 years 11 months ago
Virtual synchronization technique with OS modeling for fast and time-accurate cosimulation
Hardware/Software cosimulation is the key process to shorten the design turn around time. We have proposed a novel technique, called virtual synchronization, for fast and time acc...
Youngmin Yi, Dohyung Kim, Soonhoi Ha
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
15 years 11 months ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
15 years 11 months ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...
DATE
2003
IEEE
131views Hardware» more  DATE 2003»
15 years 11 months ago
High Speed and Highly Testable Parallel Two-Rail Code Checker
In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoi...
Martin Omaña, Daniele Rossi, Cecilia Metra
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