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ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
16 years 3 months ago
Scalable and scalably-verifiable sequential synthesis
This paper describes an efficient implementation of an effective sequential synthesis operation that uses induction to detect and merge sequentially-equivalent nodes. State-encodi...
Alan Mishchenko, Michael L. Case, Robert K. Brayto...
ICCAD
2006
IEEE
129views Hardware» more  ICCAD 2006»
16 years 3 months ago
Energy budgeting for battery-powered sensors with a known task schedule
Battery-powered wireless sensors are severely constrained by the amount of the available energy. A method for computing the energy budget per sensing task can be a valuable design...
Daler N. Rakhmatov
ICCAD
2005
IEEE
176views Hardware» more  ICCAD 2005»
16 years 3 months ago
Statistical gate sizing for timing yield optimization
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
Debjit Sinha, Narendra V. Shenoy, Hai Zhou
ICCAD
2004
IEEE
135views Hardware» more  ICCAD 2004»
16 years 3 months ago
Soft self-synchronising codes for self-calibrating communication
Self-calibrating designs are gaining momentum in both the computation and communication worlds. Instead of relying on the worst-case characterisation of design parameters, self-ca...
Frederic Worm, Paolo Ienne, Patrick Thiran
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
16 years 3 months ago
A Probabilistic-Based Design Methodology for Nanoscale Computation
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
R. Iris Bahar, Joseph L. Mundy, Jie Chen
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