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DSD
2008
IEEE
115views Hardware» more  DSD 2008»
16 years 1 months ago
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
Petr Fiser, Pavel Kubalík, Hana Kubatova
ACMDIS
2006
ACM
16 years 24 days ago
Investigating design knowledge reuse for interface development
Reusing HCI design knowledge shows potential in allowing practitioners to design based on previously identified concerns. A reuse approach is presented that is based on claims, de...
Shahtab Wahid
ICPR
2000
IEEE
15 years 11 months ago
Design of Effective Multiple Classifier Systems by Clustering of Classifiers
In the field of pattern recognition, multiple classifier systems based on the combination of outputs of a set of different classifiers have been proposed as a method for the devel...
Giorgio Giacinto, Fabio Roli, Giorgio Fumera
EUROMICRO
1999
IEEE
15 years 11 months ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
ARES
1998
Springer
15 years 11 months ago
Architecture-Centric Software Development Based on Extended Design Spaces
The realization of software projects can be significantly eased by extending the focus of reuse to architectural aspects instead of concentrating on separate software elements. Ye...
Lothar Baum, Lars Geyer, Georg Molter, Steffen Rot...