This paper explores compiler techniques for reducing the memory needed to load and run program executables. In embedded systems, where economic incentives to reduce both ram and r...
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of the cost/coverage trade-offs of fault-tolerant solutions. This fu...
Claudio Pinello, Luca P. Carloni, Alberto L. Sangi...
This paper focuses on designing network processing software for embedded processors. Our design flow CRACC represents an efficient path to implementation based on a modular applic...