— Test-access mechanisms (TAMs) and test wrappers (e.g., the IEEE Standard 1500 wrapper) facilitate the modular testing of embedded cores in a core-based system-on-chip (SOC). Su...
In macromodeling-based power estimation, circuit macromodels are created from simulations of synthetic input vector sequences. Fast generation of these sequences with all possible...
— The current internet infrastructure is facing a number of limitations that is not suitable to meet the growing number of services and users. In particular, one aspect that requ...
Sasitharan Balasubramaniam, Dmitri Botvich, Julien...
The present contribution explores the design space for virtual channel (VC) and switch allocators in network-on-chip (NoC) routers. Based on detailed RTL-level implementations, we...
We describe our experiences from implementing and integrating a new job scheduling algorithm in the gLite Grid middleware and present experimental results that compare it to the e...
A. Kretsis, Panagiotis C. Kokkinos, Emmanouel A. V...