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ISCAS
2006
IEEE
129views Hardware» more  ISCAS 2006»
16 years 11 days ago
Computing during supply voltage switching in DVS enabled real-time processors
In recent times, much attention has been devoted to power optimization for real-time systems, while guaranteeing that such systems meet their hard (or soft) scheduling deadlines. ...
Chunjie Duan, Sunil P. Khatri
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
15 years 8 months ago
On multiple-voltage high-level synthesis using algorithmic transformations
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
Hsueh-Chih Yang, Lan-Rong Dung
JVM
2004
127views Education» more  JVM 2004»
15 years 7 months ago
Towards Scalable Multiprocessor Virtual Machines
A multiprocessor virtual machine benefits its guest operating system in supporting scalable job throughput and request latency--useful properties in server consolidation where ser...
Volkmar Uhlig, Joshua LeVasseur, Espen Skoglund, U...
JSAC
2010
142views more  JSAC 2010»
15 years 4 months ago
Cross-layer optimization for streaming scalable video over fading wireless networks
—We present a cross-layer design of transmitting scalable video streams from a base station to multiple clients over a shared fading wireless network by jointly considering the a...
Honghai Zhang, Yanyan Zheng, Mohammad A. Khojastep...
IPPS
2010
IEEE
15 years 4 months ago
Exploiting inter-thread temporal locality for chip multithreading
Multi-core organizations increasingly support multiple threads per core. Threads on a core usually share a single first-level data cache, so thread schedulers must try to minimize ...
Jiayuan Meng, Jeremy W. Sheaffer, Kevin Skadron