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RTSS
1998
IEEE
15 years 11 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...
PPOPP
2010
ACM
16 years 1 months ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
CODES
2000
IEEE
15 years 11 months ago
Frequency interleaving as a codesign scheduling paradigm
Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and software behaviors so that software models with conceptually unbounded state and ...
JoAnn M. Paul, Simon N. Peffers, Donald E. Thomas
JCS
2007
80views more  JCS 2007»
15 years 6 months ago
Secure information flow for a concurrent language with scheduling
Information flow type systems provide an elegant means to enforce confidentiality of programs. Using the proof assistant Isabelle/HOL, we have specified an information flow ty...
Gilles Barthe, Leonor Prensa Nieto
ASPLOS
2010
ACM
16 years 1 months ago
Addressing shared resource contention in multicore processors via scheduling
Contention for shared resources on multicore processors remains an unsolved problem in existing systems despite significant research efforts dedicated to this problem in the past...
Sergey Zhuravlev, Sergey Blagodurov, Alexandra Fed...