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DATE
2008
IEEE
116views Hardware» more  DATE 2008»
16 years 1 months ago
A Variation Aware High Level Synthesis Framework
— The worst-case delay/power of function units has been used in traditional high level synthesis to facilitate design space exploration. As technology scales to nanometer regime,...
Feng Wang 0004, Guangyu Sun, Yuan Xie
FDL
2008
IEEE
16 years 1 months ago
Model-based Design Space Exploration for RTES with SysML and MARTE
The features of the emerging modeling languages for system design allow designers to build models of almost any kind of heterogeneous hardware-software systems, including Real Tim...
Marcello Mura, Luis Gabriel Murillo, Mauro Prevost...
IPPS
2007
IEEE
16 years 28 days ago
ParalleX: A Study of A New Parallel Computation Model
This paper proposes the study of a new computation model that attempts to address the underlying sources of performance degradation (e.g. latency, overhead, and starvation) and th...
Guang R. Gao, Thomas L. Sterling, Rick Stevens, Ma...
ADC
2007
Springer
145views Database» more  ADC 2007»
16 years 24 days ago
Selectivity Estimation by Batch-Query based Histogram and Parametric Method
Histograms are used extensively for selectivity estimation and approximate query processing. Workloadaware dynamic histograms can self-tune itself based on query feedback without ...
Jizhou Luo, Xiaofang Zhou, Yu Zhang, Heng Tao Shen...
ECTEL
2007
Springer
16 years 24 days ago
Remote Cooperation on Project-centred Learning: a Working Implemented Solution in Academia
The paper aims at illustrating the original technical solution provided within an academic institute in order to manage teaching activities, encompassing the coordination of projec...
Carola Salvioni, Antonio Vincenzo Taddeo