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DATE
2000
IEEE
94views Hardware» more  DATE 2000»
15 years 11 months ago
Shared Memory Implementations of Synchronous Dataflow Specifications
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...
Praveen K. Murthy, Shuvra S. Bhattacharyya
EUROSYS
2006
ACM
16 years 3 months ago
Balancing power consumption in multiprocessor systems
Actions usually taken to prevent processors from overheating, such as decreasing the frequency or stopping the execution flow, also degrade performance. Multiprocessor systems, h...
Andreas Merkel, Frank Bellosa
DATE
2003
IEEE
137views Hardware» more  DATE 2003»
16 years 3 days ago
Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexa...
ISSS
2002
IEEE
194views Hardware» more  ISSS 2002»
15 years 11 months ago
Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems
This paper addresses the problem of mapping an application, which is highly dynamic in the future, onto a heterogeneous multiprocessor platform in an energy efficient way. A two-p...
Rudy Lauwereins, Chun Wong, Paul Marchal, Johan Vo...
HIPEAC
2009
Springer
16 years 1 months ago
Predictive Runtime Code Scheduling for Heterogeneous Architectures
Heterogeneous architectures are currently widespread. With the advent of easy-to-program general purpose GPUs, virtually every recent desktop computer is a heterogeneous system. Co...
Víctor J. Jiménez, Lluís Vila...