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» Schedule processes, not VCPUs
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ICNP
2009
IEEE
15 years 4 months ago
A Mismatch Controller for Implementing High-Speed Rate-based Transport Protocols
End-to-end rate-based congestion control algorithms are advocated for audio/video transport over the Internet instead of window-based protocols. Once the congestion controller has ...
Luca De Cicco, Saverio Mascolo
CCGRID
2010
IEEE
15 years 4 months ago
File-Access Characteristics of Data-Intensive Workflow Applications
This paper studies five real-world data intensive workflow applications in the fields of natural language processing, astronomy image analysis, and web data analysis. Data intensiv...
Takeshi Shibata, SungJun Choi, Kenjiro Taura
178
Voted
ICASSP
2008
IEEE
16 years 1 months ago
On security-aware transmission scheduling
The problem of interest is to characterize to what extent nodes independently following certain transmission schedules can be hijacked to relay flows of information packets. Info...
Ting He, Ameya Agaskar, Lang Tong
178
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ICCAD
2004
IEEE
127views Hardware» more  ICCAD 2004»
16 years 3 months ago
A yield improvement methodology using pre- and post-silicon statistical clock scheduling
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
15 years 11 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....