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MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
16 years 28 days ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
MICRO
2008
IEEE
136views Hardware» more  MICRO 2008»
16 years 28 days ago
Power to the people: Leveraging human physiological traits to control microprocessor frequency
Any architectural optimization aims at satisfying the end user. However, modern architectures execute with little to no knowledge about the individual user. If architectures could...
Alex Shye, Yan Pan, Benjamin Scholbrock, J. Scott ...
NDSS
2008
IEEE
16 years 28 days ago
Automatic Protocol Format Reverse Engineering through Context-Aware Monitored Execution
Protocol reverse engineering has often been a manual process that is considered time-consuming, tedious and error-prone. To address this limitation, a number of solutions have rec...
Zhiqiang Lin, Xuxian Jiang, Dongyan Xu, Xiangyu Zh...
QEST
2008
IEEE
16 years 28 days ago
Quasi-Birth-Death Processes, Tree-Like QBDs, Probabilistic 1-Counter Automata, and Pushdown Systems
We begin by observing that (discrete-time) QuasiBirth-Death Processes (QBDs) are equivalent, in a precise sense, to (discrete-time) probabilistic 1-Counter Automata (p1CAs), and b...
Kousha Etessami, Dominik Wojtczak, Mihalis Yannaka...
QEST
2008
IEEE
16 years 28 days ago
Symbolic Magnifying Lens Abstraction in Markov Decision Processes
Magnifying Lens Abstraction in Markov Decision Processes ∗ Pritam Roy1 David Parker2 Gethin Norman2 Luca de Alfaro1 Computer Engineering Dept, UC Santa Cruz, Santa Cruz, CA, USA ...
Pritam Roy, David Parker, Gethin Norman, Luca de A...
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