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ICCD
2007
IEEE
121views Hardware» more  ICCD 2007»
16 years 3 months ago
Fast power network analysis with multiple clock domains
This paper proposes an efficient analysis flow and an algorithm to identify the worst case noise for power networks with multiple clock domains. First, we apply the Laplace transf...
Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Z...
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
16 years 3 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
ICCAD
2006
IEEE
149views Hardware» more  ICCAD 2006»
16 years 3 months ago
Thermal sensor allocation and placement for reconfigurable systems
Temperature monitoring using thermal sensors is an essential tool for evaluating the thermal behavior and sustaining the reliable operation in high-performance and high-power syst...
Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci...
ICCAD
2006
IEEE
123views Hardware» more  ICCAD 2006»
16 years 3 months ago
A revisit to floorplan optimization by Lagrangian relaxation
With the advent of deep sub-micron (DSM) era, floorplanning has become increasingly important in physical design process. In this paper we clarify a misunderstanding in using Lag...
Chuan Lin, Hai Zhou, Chris C. N. Chu
VEE
2010
ACM
327views Virtualization» more  VEE 2010»
16 years 1 months ago
AASH: an asymmetry-aware scheduler for hypervisors
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
Vahid Kazempour, Ali Kamali, Alexandra Fedorova