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MICRO
2005
IEEE
117views Hardware» more  MICRO 2005»
15 years 11 months ago
A Quantum Logic Array Microarchitecture: Scalable Quantum Data Movement and Computation
Recent experimental advances have demonstrated technologies capable of supporting scalable quantum computation. A critical next step is how to put those technologies together into...
Tzvetan S. Metodi, Darshan D. Thaker, Andrew W. Cr...
158
Voted
IEEEPACT
2006
IEEE
16 years 3 days ago
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhan...
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 10 months ago
Use ECP, not ECC, for hard failures in resistive memories
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...
Stuart E. Schechter, Gabriel H. Loh, Karin Straus,...
HPCA
1998
IEEE
15 years 10 months ago
Communication Across Fault-Containment Firewalls on the SGI Origin
Scalability and reliability are inseparable in high-performance computing. Fault-isolation through hardware is a popular means of providing reliability. Unfortunately, such isolat...
Kaushik Ghosh, Allan J. Christie
IPPS
2007
IEEE
16 years 11 days ago
Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao