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» Scalable Resource Management in High Performance Computers
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FCCM
2006
IEEE
131views VLSI» more  FCCM 2006»
16 years 22 days ago
Packet Switched vs. Time Multiplexed FPGA Overlay Networks
— Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited ...
Nachiket Kapre, Nikil Mehta, Michael DeLorimier, R...
HPDC
1999
IEEE
15 years 11 months ago
Process Hijacking
Process checkpointing is a basic mechanism required for providing High Throughput Computing service on distributively owned resources. We present a new process checkpoint and migr...
Victor C. Zandy, Barton P. Miller, Miron Livny
AINA
2007
IEEE
16 years 1 months ago
An Application-Driven MAC-layer Buffer Management with Active Dropping for Real-time Video Streaming in 802.16 Networks
— In this paper, we propose an application-driven MAC-layer buffer management framework based on a novel Active Dropping (AD) mechanism for real-time video streaming in IEEE 802....
James She, Fen Hou, Pin-Han Ho
ICSE
2004
IEEE-ACM
16 years 6 months ago
Skoll: Distributed Continuous Quality Assurance
Quality assurance (QA) tasks, such as testing, profiling, and performance evaluation, have historically been done in-house on developer-generated workloads and regression suites. ...
Atif M. Memon, Adam A. Porter, Cemal Yilmaz, Adith...
IEEEPACT
2005
IEEE
16 years 8 days ago
A Distributed Control Path Architecture for VLIW Processors
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael...