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» Sanity Checks in Formal Verification
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SIGSOFT
2003
ACM
16 years 6 months ago
Towards scalable compositional analysis by refactoring design models
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
Yung-Pin Cheng, Michal Young, Che-Ling Huang, Chia...
PLDI
2010
ACM
15 years 10 months ago
Bringing Extensibility to Verified Compilers
Verified compilers, such as Leroy's CompCert, are accompanied by a fully checked correctness proof. Both the compiler and proof are often constructed with an interactive proo...
Zachary Tatlock, Sorin Lerner
EMSOFT
2006
Springer
15 years 9 months ago
Analysis of the zeroconf protocol using UPPAAL
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...
Biniam Gebremichael, Frits W. Vaandrager, Miaomiao...
HICSS
2008
IEEE
130views Biometrics» more  HICSS 2008»
16 years 13 days ago
Enterprise Modeling for Information System Development within MDA
Object-oriented analysis suggests semiformal usecase driven techniques for problem domain modeling from a computation independent viewpoint. The proposed approach called Topologic...
Janis Osis, Erika Asnina
B
2007
Springer
15 years 10 months ago
Automatic Translation from Combined B and CSP Specification to Java Programs
Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...
Letu Yang, Michael Poppleton