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CGO
2006
IEEE
16 years 1 days ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal
IOPADS
1996
100views more  IOPADS 1996»
15 years 7 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
SIGCOMM
2009
ACM
16 years 14 days ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
PPOPP
2010
ACM
16 years 14 days ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
TCOM
2010
156views more  TCOM 2010»
15 years 21 days ago
Joint Carrier Frequency Offset and Channel Estimation for Uplink MIMO-OFDMA Systems Using Parallel Schmidt Rao-Blackwellized Par
Joint carrier frequency offset (CFO) and channel estimation for uplink MIMO-OFDMA systems over time-varying channels is investigated. To cope with the prohibitive computational co...
Kyeong Jin Kim, Man-On Pun, Ronald A. Iltis