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» SAT, SMT and Applications
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GLVLSI
2003
IEEE
153views VLSI» more  GLVLSI 2003»
15 years 11 months ago
FORCE: a fast and easy-to-implement variable-ordering heuristic
The MINCE heuristic for variable-ordering [1] successfully reduces the size of BDDs and can accelerate SAT-solving. Applications to reachability analysis have also been successful...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
15 years 10 months ago
Algorithms for Solving Boolean Satisfiability in Combinational Circuits
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
Luís Guerra e Silva, Luis Miguel Silveira, ...
ICTAI
1997
IEEE
15 years 9 months ago
Prime Implicant Computation Using Satisfiability Algorithms
The computation of prime implicants has several and significant applications in different areas, including Automated Reasoning, Non-Monotonic Reasoning, Electronic Design Automati...
Vasco M. Manquinho, Paulo F. Flores, João P...
AAAI
2008
15 years 8 months ago
Clause Learning Can Effectively P-Simulate General Propositional Resolution
Currently, the most effective complete SAT solvers are based on the DPLL algorithm augmented by clause learning. These solvers can handle many real-world problems from application...
Philipp Hertel, Fahiem Bacchus, Toniann Pitassi, A...
CHES
2010
Springer
166views Cryptology» more  CHES 2010»
15 years 7 months ago
Algebraic Side-Channel Analysis in the Presence of Errors
Measurement errors make power analysis attacks difficult to mount when only a single power trace is available: the statistical methods that make DPA attacks so successful are not a...
Yossef Oren, Mario Kirschbaum, Thomas Popp, Avisha...