3712 search results - page 277 / 743 » Role-Based Access Control |
160
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CSFW
1994
IEEE
15 years 10 months ago
1994
IEEE
We analyze the safety question for the Non-Monotonic Transform NMT model, an access control model that encompasses a wide variety of practical access control mechanisms. In genera...
177
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HICSS
1995
IEEE
15 years 10 months ago
1995
IEEE
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
215
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CSREASAM
2009
15 years 7 months ago
2009
- Until recently the reasons for reduced efficiency and limited implementation of new security systems has been the insufficient performance of hardware that executes access contro...
181
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IEEEPACT
2009
IEEE
2009
IEEE
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
16 years 1 months ago
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
183
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SBACPAD
2006
IEEE
16 years 19 days ago
2006
IEEE
Neural-inspired branch predictors achieve very low branch misprediction rates. However, previously proposed implementations have a variety of characteristics that make them challe...