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ISSS
2002
IEEE
106views Hardware» more  ISSS 2002»
15 years 11 months ago
Modeling Assembly Instruction Timing in Superscalar Architectures
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
William Fornaciari, Vito Trianni, Carlo Brandolese...
TASE
2010
IEEE
15 years 1 months ago
A Semantic Feature Model in Concurrent Engineering
Concurrent engineering (CE) is a methodology applied to product lifecycle development so that high quality, well designed products can be provided at lower prices and in less time....
Yong-Jin Liu, Kam-Lung Lai, Gang Dai, Matthew Ming...
VISAPP
2007
15 years 7 months ago
Modeling non-gaussian noise for robust image analysis
Accurate noise models are important to perform reliable robust image analysis. Indeed, many vision problems can be seen as parameter estimation problems. In this paper, two noise m...
Sio-Song Ieng, Jean-Philippe Tarel, Pierre Charbon...
ESTIMEDIA
2004
Springer
15 years 12 months ago
A queuing-theoretic performance model for context-flow system-on-chip platforms
Abstract—Few analytical performance models that relate performance figure of merit to architectural design decisions are reported in recent studies of network-on-chip, which pre...
Rami Beidas, Jianwen Zhu
ICSE
2008
IEEE-ACM
16 years 6 months ago
An ontology-driven software architecture evaluation method
Software architecture evaluation has a crucial role in the life cycle of software intensive systems. In this paper we propose an approach to empower a software architecture evalua...
Aida Erfanian, Fereidoun Shams Aliee